Bus Differential Protection
Bus differential protection (ANSI 87B) is a protective relaying scheme that safeguards an electrical bus by continuously comparing the vector sum of all currents entering and leaving via current transformers. If the differential current exceeds a set threshold, it trips all associated breakers to clear internal faults rapidly, while remaining stable for external faults and normal conditions. Modern schemes use low-impedance restrained relays with percentage characteristics.
In industrial plants, bus differential protection is applied to medium- or low-voltage switchgear buses distributing power to motors and loads. Implementation involves defining protection zones for each bus section, installing CTs with consistent polarity on each feeder, and configuring relays with restrained differential characteristics to avoid misoperation during CT saturation. Trip logic issues high-speed commands to all breakers in the zone upon internal fault detection. This protection limits arc-flash energy and equipment damage, supporting compliance with electrical safety standards like NFPA 70E and CSA Z462.
- CT selection, polarity, and saturation problems leading to misoperation due to mismatched ratios or incorrect wiring.
- Improper zone definition and dynamic zone logic errors in complex bus arrangements, causing unprotected sections or over-tripping.
- Testing, maintenance, and human-factor failures, such as inadequate commissioning tests or relays left disabled, increasing arc-flash risk.
What is the underlying operating principle of bus differential protection (Merz-Price principle)?
Bus differential schemes apply the Merz-Price circulating current principle: CTs on each connection are wired so that under normal and external-fault conditions, secondary currents circulate between CTs with no current through the relay. For an internal bus fault, the vector sum of CT secondary currents becomes unbalanced, causing a net operating current that exceeds the pickup threshold and initiates tripping.
How do low-impedance restrained differential schemes maintain security against CT saturation during through-faults?
Low-impedance 87B relays compare operating current against a multiple of restraint current using a percentage characteristic. This requires I_op ≥ K * I_res + I_bias, where K increases with current (dual-slope). During external faults with CT saturation, the large through-fault current produces high restraint, keeping the relay stable unless unbalance is very high. Advanced relays may also detect saturation waveforms and increase restraint or apply security timers.
When would a high-impedance bus differential scheme be chosen over low-impedance?
High-impedance bus differential is preferred for simple, static bus arrangements with matched CTs having adequate knee-point voltage. It offers high security against moderate CT mismatch and operates mainly for substantial internal faults. Low-impedance schemes are favored for complex topologies requiring dynamic zone selection or mixed CT characteristics.